1. Field of the Invention
The present invention relates to a semiconductor memory device in which non-volatile memory circuits are built in one chip.
2. Description of the Related Art
A micro-controller is configured to integrate an MPU (microprocessing unit), a RAM (random access memory), a ROM (read only memory), an IO (input/output circuit), an interface circuit and the like on one chip. The memory capacity of a non-volatile flash memory being one of such an integrated circuit is diverse from some kilobytes to several tens of megabytes, and the flash memory is generally comprised of a plurality of sectors, and the sector constitution is properly changed depending on a required memory capacity.
Therefore, in order to reduce the man-hour of its development, for example, in case that a non-volatile memory having 1 MB memory capacity is required in one chip, in some cases, two memories having been developed up to 512 KB are built in one chip. Such being the case, in the case where two memories are built in one chip, at each of the memories, rewriting and reading operation can be executed individually. Especially, in connection with the rewriting, it is possible to continuously erase all the data in one memory by one command, and also it is possible to individually erase the data in the sector unit. Erase control technologies at a flash memory or an EEPROM being one kind of the non-volatile memory have been proposed in the following Patent Documents 1 and 2.    [Patent Document 1] Japanese Patent Application Laid-Open No. 2003-223792    [Patent Document 2] Japanese Patent Application Laid-Open No. HEI 5-12889